tnt
12/26/2020, 5:25 PMTim Edwards
12/27/2020, 4:02 PMtnt
12/27/2020, 4:11 PMhttp://www.csit-sun.pub.ro/courses/vlsi/CursVLSI/www.lesia.insa-toulouse.fr/_bendhia/Cours/CMOS/images/memory49.jpg▾
met1
to set the rom content.
The gates are wired to the 4 word lines running all along horizontally.
On the "top" there needs to be pull-ups / pre-charge to set the bitlines high if nothing is forcing them down.
And on the "bottom", a buffer that will read the actual value and provide the required drive strength to actually drive logic.
Of course it's also completely possible I misunderstood fundamentally how this is supposed to work 😅Tim Edwards
12/28/2020, 2:53 PM