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May be of use for many : <https://docs.google.com/...
# sky130
j
May be of use for many : https://docs.google.com/document/d/1hSLKsz9xcEJgAMmYYer5cDwvPqas9_JGRUAgEORx1Yw/edit?usp=sharing. We created it for our Digital Integrated Circuits class to get students ready to start building bigger systems in SKW 130nm. Comments are welcome!
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m
Can you create parametric cells in Magic?
j
Theoretically - yes. But, for now the tutorial is used for creating custom logic without a pcell.
m
It is funny that I am hearing again about Magic after a quarter century hiatus.
j
I use it in my classes for undergraduates as it really gets them quick into layout - plus Tim Edwards has put so much into new features that makes it an outstanding choice for anyone.
I used it first in the early 90s, so I understand the comment 🙂
m
Have you considered something like Glade?
j
Not really based on what Tim has done
I have used many others : LASI as well as many commercial editors
LASI was actually the first one that I used extensively (at least open-source wise)
before that was archaic ones with pucks (very ancient)
I should remember them but maybe my brain is choosing to forget 😄
m
Never really used Magic. I have done my PhD in mid 90s in the UK. Even then, the European universities could use Cadence.
Please check Glade at peardrop.co.uk
Full python scripting and python parametric cells are available
I already have done some work to be able to use Glade with Skywater 130 technology.
Glade is free but not open source.
r
Hey, Does anyone know if there is a open tool for std-cell characterization? So I could generate .libs for sky130?
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l
Just a small addition. Maybe I'm wrong, but for spice extraction from the magic layout, you must convert the labels to ports, so it creates a proper subcircuit. I don't know if it's needed for standard cell logic circuits.
j
Not yet - I am working on it.
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i.e., for std cell characterization
@Luis Henrique Rodovalho I believe it extracts a subckt which you can then use in a top-level SPICE deck. For standard-cell logic circuits you just need that subckt to use in your characterization. Right now, we use Cadence Design Systems liberate to characterize all the standard-cells in SKY and OSU versions for sky130. Again, we hope to have an open-source characterization tool soon.
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m
@Luis Henrique Rodovalho How old is your tech file? @Tim Edwards made some changes that might enable the extraction of labels as ports.
l
I'm using Open PDKs 1.0.165 and Magic 8.3. Is there a command to extract labels as ports?
t
@Luis Henrique Rodovalho: You need to declare labels as ports in the layout for them to extract as ports. If you create labels using the "Text..." menu popup window, there's a checkbox to declare a label to be a port. Otherwise, you can use the "port make" command.
l
@Tim Edwards This is exactly how I do this. I use the port make command. By the way, how do I change the label fontsize? The user analog project wrapper has nice and large labels. When I try to resize the subcell labels, it never works.
t
@Luis Henrique Rodovalho: The above image looks like my user project wrapper, where I added a non-port label for visibility. If you use the "Text..." pop-up window from the menu, you can choose the text size in microns (and font, rotation, etc.). You just need to select the label and it will appear in the pop-up window. The equivalent command-line command is "setlabel" ("setlabel size", "setlabel font", etc.).
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