Junaid amjad
12/30/2021, 7:41 AMHadir Khan
12/30/2021, 7:49 AMVijayan Krishnan
12/30/2021, 8:01 AMJunaid amjad
12/30/2021, 9:25 AMVijayan Krishnan
12/30/2021, 9:51 AMJunaid amjad
12/30/2021, 9:53 AMVijayan Krishnan
12/30/2021, 10:07 AMJunaid amjad
12/30/2021, 10:09 AMVijayan Krishnan
12/30/2021, 10:12 AMJunaid amjad
12/30/2021, 11:53 AMVijayan Krishnan
12/30/2021, 12:01 PMJunaid amjad
12/30/2021, 12:29 PMVijayan Krishnan
12/30/2021, 12:40 PM# User config
set ::env(DESIGN_NAME) main
# Change if needed
set ::env(VERILOG_FILES) [glob $::env(DESIGN_DIR)/src/*.v]
# Fill this
set ::env(CLOCK_PERIOD) "100"
set ::env(CLOCK_PORT) "clk"
set ::env(SYNTH_READ_BLACKBOX_LIB) 1
set ::env(SYNTH_USE_PG_PINS_DEFINES) "USE_POWER_PINS"
set ::env(FP_SIZING) absolute
set ::env(DIE_AREA) "0 0 2920 3520"
set ::env(RUN_CVC) 0
set filename $::env(DESIGN_DIR)/$::env(PDK)_$::env(STD_CELL_LIBRARY)_config.tcl
if { [file exists $filename] == 1} {
source $filename
}
Junaid amjad
12/30/2021, 12:40 PMVijayan Krishnan
12/30/2021, 12:41 PMJunaid amjad
12/30/2021, 12:44 PMVijayan Krishnan
12/30/2021, 12:45 PMJunaid amjad
12/30/2021, 12:46 PMVijayan Krishnan
12/30/2021, 12:46 PMJunaid amjad
12/30/2021, 12:47 PMVijayan Krishnan
12/30/2021, 12:51 PMJunaid amjad
12/30/2021, 12:57 PMVijayan Krishnan
12/30/2021, 1:23 PMJunaid amjad
12/30/2021, 1:24 PMVijayan Krishnan
12/30/2021, 1:54 PMconfig: /openlane/scripts/openroad/pdn_cfg.tcl
[ERROR PDN-0085] Pitch 3.6799999999999997 specified for layer met4 is less than 2 x (width + spacing) (width=3.0, spacing=1.84).
Error: pdn_cfg.tcl, 39 PDN-0085
Junaid amjad
12/30/2021, 2:03 PMVijayan Krishnan
12/30/2021, 2:11 PMJunaid amjad
12/30/2021, 2:38 PMVijayan Krishnan
12/30/2021, 2:42 PM30. Printing statistics.
=== risc32_scp ===
Number of wires: 2
Number of wire bits: 2
Number of public wires: 2
Number of public wire bits: 2
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 0
Junaid amjad
12/30/2021, 2:45 PMVijayan Krishnan
12/30/2021, 2:48 PMJunaid amjad
12/30/2021, 2:50 PMVijayan Krishnan
12/30/2021, 2:51 PMNumber of wires: 2
Number of wire bits: 2
Number of public wires: 2
Number of public wire bits: 2
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 0
Junaid amjad
12/30/2021, 2:53 PMVijayan Krishnan
12/30/2021, 2:58 PMJunaid amjad
12/30/2021, 3:00 PMVijayan Krishnan
12/30/2021, 3:00 PMJunaid amjad
12/30/2021, 3:01 PMVijayan Krishnan
12/30/2021, 3:05 PMJunaid amjad
12/30/2021, 3:14 PMVijayan Krishnan
12/30/2021, 3:17 PMJunaid amjad
12/30/2021, 3:20 PMVijayan Krishnan
12/31/2021, 10:40 AM15.5. Executing OPT_CLEAN pass (remove unused cells and wires).
Finding unused cells or wires in module \main..
Removed 1010 unused cells and 1736 unused wires.
<suppressed ~1104 debug messages>
Need to find option to skip thisJunaid amjad
01/03/2022, 6:02 AMVijayan Krishnan
01/03/2022, 6:34 AMdonn
01/03/2022, 11:30 AMJunaid amjad
01/03/2022, 12:42 PMdonn
01/03/2022, 12:42 PMJunaid amjad
01/03/2022, 12:44 PMdonn
01/03/2022, 12:44 PMJunaid amjad
01/03/2022, 12:45 PMdonn
01/03/2022, 12:46 PMJunaid amjad
01/03/2022, 12:51 PM