Somebody knows if exists a video/doc which shows the step-by-step (in pratice) how to connect our project on efabless chip and run the other necessary steps to complete the tapeout?

You can check this, is old but is how to do the hardening using the example code for the user proj example. But I need to warn you that caravel has change a lot for MPW-5 so will be differences.

I forgot to say it: my project is analog.

Simplified: make netlist (spice or xschem generated spice) make testbench (spice or xschem) simulate (ngspice) edit gds using Klayout/Magic VLSI pass drc (magic) pass lvs (magic) do pex simulation (magic + ngspice) pass precheck upload to efabless