Hello, for the MPW5 I see projects where people disable fill and tapcell insertion at the config.tcl of user_project_wrapper. From the general ASIC tapeout perspective I think that there should be no empty area, it should be filled with filler cells. Am I wrong? Also I want to put buffers on the top level to overcome slew violations at the top level. To integrate them, should I also include tapcells? Maybe the standard cells have taps inside at this technology?

Fill generators are applied to the final layout, so it is not necessary to fill the whole wrapper. It is, however, necessary to fill the whole digital block. Taps are not included inside the cells in these standard cell libraries, so tap cells must always be added inside digital blocks.

thanks for the answer