Burak Yakup Çakar

04/03/2022, 2:03 PM
Hello everyone, I had a mismatch error at lvs stage, when running user_project_wrapper. When I looked at lvs log file, I saw these power pins mismatch.
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vccd1_uq0                                  |vccd1 **Mismatch**        
vssd1_uq0                                  |vssd1 **Mismatch** 
vccd1                                      |(no matching pin)                          
vssd1                                      |(no matching pin)                          
vdda2_uq0                                  |(no matching pin)                          
vdda1_uq0                                  |(no matching pin)                          
vccd2_uq0                                  |(no matching pin)                          
vssd2_uq0                                  |(no matching pin)                          
vssa2_uq0                                  |(no matching pin)                          
vssa1_uq0                                  |(no matching pin)
The *_uq0 pins are created by the flow, not by me. How can I solve this mismatch? Reproducibles and log files can be downloaded here. I also opened a github issue in OpenLane repository, but it did not much help. For more explanation, you can see the github issue here.

Mitch Bailey

04/03/2022, 4:57 PM
Your result is matching circuits with mismatching pins, correct? Does this cause a problem with mpw precheck? The current flow often yields the similar results at this level. You could try
in the config.tcl file or
in the shell before running lvs. You could also modify the extraction commands to use
extract unique notopports
instead of the current
extract unique
. See

Dinesh A

04/04/2022, 4:46 AM
@Burak Yakup Çakar I used to see this issue in my repo. Look like during PDN there are Isolated Power Mesh .. i.e some of vertical power net not connected horizontal net between hard-ip. These isolated power net are named with *_uq0,*_uq1 during spice extraction .. One way to resolve this issue is to give more space between hard-ip

Burak Yakup Çakar

04/10/2022, 7:37 PM
Thank you both for your support. It helped a lot 🙂