I've been having trouble finding examples with ngs...
# analog-design
t
I've been having trouble finding examples with ngspice since most people are using virtuoso which I believe has an option to calculate the needed plots workout writing the spice code
u
this is what I was using on ngspice/octave to characterize the transistors on other processes https://gist.github.com/20Mhz/ab7c58c01b9e7259f8d1140a742e400a https://gist.github.com/20Mhz/67d6b1b0e3b1f64e04837f54fd02d095 I was thinking to get it updated to python…to be started…
s
my problem with ngspice is that save /plot/probe @mxx[gm] gives me a constant value regardless of any biasing conditions of the mos
u
for dc analysis?
s
yes
u
well seems bogus, below used to work:
Copy code
vdsn     vdn 0         dc 'ds'
vgsn     vgn 0         dc 'gs'
vbsn     vbn 0         dc '-subvol'
mn       vdn vgn 0 vbn ami06n L='length' W='width'
vdsp     vdp 0         dc '-ds'
vgsp     vgp 0         dc '-gs'
vbsp     vbp 0         dc 'subvol'
mp       vdp vgp 0 vbp ami06p L='length' W='width'

.options dccap post brief accurate nomod
.op
.dc vdsn 0 'gsmax' 'gsstep' vgsn 0 'dsmax' 'dsstep'

.probe @mn[id]
.probe @mn[vth]
.probe @mn[gm]
.probe @mn[gmbs]
are you doing something different? I did have the wrapper on octave so each op is its own instance
s
UPDATE got it working now, dunno what i did wrong before...
🎉 1
.dc vg 0 1.8 0.01 .probe @m.xm2.msky130_fd_pr__nfet_01v8[gm]
t
What did you use for a circuit? Vg source direct to gate, 1.8v direct to d, ground s? Or do you have any other components
s
this example has drain fixed to 1.8 and varying gate
and you can plot vs id: plot @m.xm2.msky130_fd_pr__nfet_01v8[gm] vs i(vd2)
9.png
just vd=1.8 gate = parameter, source, body at 0. no other elements
last part gm starts to (slowly) decrease 🙂
i put a 0V voltage source in series to the drain to get the current with a small expression ( i(vd2) ) instead of the long ngspice syntax for getting Id
like this: