In CMOS, I'd suggest a switched attenuator instead of a VGA whenever possible. I have done them in 0.35um for 390MHz IF (with 1dB steps) and also 0.18um at 2GHz, with 6dB steps. You can use R-2R ladder, or a R:75R ladder (really R/5:15R or R/15:5R made of unit resistors). You could drive a 50 Ohm attenuator ladder directly from the input port, and use NMOS swqitches (maybe a T-arrangement of 3 switches if you need high isolation, I modified the T-structure to have 8 inputs and one output, to reduce the number of fets connected to the output node) to select a tap to feed to a high-impedance input of the next stage.
Otherwise, if you have a signal current available (e.g. from the drain of an amplifier device), you can switch the signal current into different taps on the ladder for different attenuation, and the end of the resistive ladder gives you a resistive output impedance that is about constant. If you are just driving a high-impedance stage from it then you can put a bunch of switched resistors across the termination of the ladder, to do fine gain steps. I think I did 1/64dB steps on one baseband attenuator like that.
In one of the Jim Williams books I recall that there is a design for a scope frontend intended for IC manufacture, that somehow keeps the high voltages off the chip IIRC, I should look at that again one day soon.
BTW, I am thinking of doing a sampling scope, need a trigger comparator, adjustable delay and sample-and-hold, probably using an off-chip ADC due to not having time do design one. Should be possible to achieve many-GHz bandwidth on this process.