@User: There is no example of a project using analog. However, the general rule is: Connect to any GPIO pad above GPIO[7] (the ones from 0 to 7 will be connected to other chips on the development board). Connect to the pins in the user project wrapper cell called "analog_io". The management SoC must then execute a program on startup that turns off all digital signals on the GPIOs where you are using analog signals. There is one "analog_io" signal per GPIO pin. Bear in mind that the analog_io pin connects directly to the pad (through a small resistor).

@Arsalan Athar @Affan Abbasi @ibad1112

Thanks for your replay @Tim Edwards !

But will this allow more than 1.8v? I assume the digital stuff that controls the pin runs at that level, and would be a shame if some 20v analog designs blows up because of that.

@Pepijn de Vos: The pads may be driven up to 5.5V, although anything above 3.3V requires the 3.3V voltage regulator on the demonstration/development board to be replaced.

Alright. I was planning to use the 10v5 devices with +5 and -5v, but I can scale back my plans a bit. (not for this shuttle run anyway)

@Tim Edwards has the final user area gds been released yet or still working through the 40 -> 41 change? Looking at the repo

user_project_wrapper_empty.gds

was last updated 8 days ago so I guess not but just want to double check

@yrrapt: Final GDS is supposed to be ready today, as I understand it.

@Tim Edwards Great, thanks for the update

@Affan Abbasi This answer tells to connect to the analog io pins in layout