I'm currently running into some issues with netgen matching a MiM cap component. Netgen correctly detects the number of devices and nets for both my layout and schematic (and gives an LVS clean for netlist and circuit matching), but it detects property errors with the MiM caps, namely with matching length and width. I've manually gone through both the layout netlist and my schematic netlist and have verified that both have the correct number of capacitors of each length/width and that these are connected to the correct respective nets, but for some reason, netgen fails to match the two. In fact, it lists the two caps it can't match properties for (lines 83-88 in comp.out), but just by swapping the two, it should be able to. I'll post both SPICE files and the comp.out file in the comments here. Any input would be appreciated, thanks!

I believe this is related to an item I have marked "to do" in the netgen code. I have netgen sorting parallel devices by "critical parameter" which is, in this case, width. What I don't have is a secondary sorting, which is allowing netgen to have devices (2x10 and 2x2) on one side and (2x2 and 2x10) on the other side, and not know that it can swap them. If you can put up with having a report saying there are mismatched properties for now, I will get that implemented eventually.

Got it, thanks!

Okay: The latest commit on the netgen git repo on opencircuitdesign.com fixes this problem.

Is the fix also on the mirror github site?

It will update overnight (in about 6 hours).