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#analog-design
Title
# analog-design
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Gian

08/23/2021, 9:46 AM
Hello all. Sorry if this was asked before.I saw 2 files for nfet_01v8 1.sky130_fd_pr__nfet_01v8__ss.corner.spice - This file contains some parameters with specific L and W given. 2.https://raw.githubusercontent.com/google/skywater-pdk-libs-sky130_fd_pr/f62031a1be9aefe90[…]36/cells/nfet_01v8/sky130_fd_pr__nfet_01v8__ss.pm3.spice - This file contains the raw file for this process. In the first file some parameters are given for specific w and l which means we must use only those w and l's?Can someone please help me. In the second file there are many models for this symbol.How to choose among them.Because i have used only tsmc 180 nm before which has only one library file.Please help me to figure out that.
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Luis Henrique Rodovalho

08/23/2021, 1:11 PM
This is called binning. http://literature.cdn.keysight.com/litweb/pdf/iccap2008addon2/icmdl/icmdl05a11.html TSMC model files, at least those in the official PDK, also use this technique.
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t

Tim Edwards

08/23/2021, 1:48 PM
@Gian: Most of the devices are "micro-binned", which means that they were characterized/measured at specific widths and lengths. Unfortunately, the characterization didn't do a particularly good job of smoothly extrapolating between bins, so that, as some people have noticed, there are some device parameters that can be pretty far out of spec in the simulation model for a device that has W or L between or outside of the characterized bins. This doesn't mean that you can't use devices of any size other than the characterized sizes, but it does mean that there's a small chance that you might end up with quirky behavior in simulation. As for what files to use: You should use the open_pdks installation (https://github.com/RTimothyEdwards/open_pdks), and then use the file
sky130.lib.spice
with the
.lib
statement in SPICE (e.g., ngspice) followed by a process corner; e.g.,
.lib /usr/local/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
. If you are using ngspice then you should also copy the file
/usr/local/share/pdk/sky130A/libs.tech/ngspice/spinit
to the simulation directory an rename it `.spiceinit`; otherwise ngspice is very slow reading the binned device models.
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Gian

08/23/2021, 2:12 PM
In order to design for a specific requirement i need library file and here i have many models for the same symbol.My question is which model should be used and why?
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Luis Henrique Rodovalho

08/23/2021, 4:20 PM
It's automatic. You should only instance the transistor. Ngspice will deal automatically with any transistor dimensions in your design. If the transistor dimensions are not exactly the ones in the bin models, it will interpolate the transistor parameters. https://github.com/google/skywater-pdk-libs-sky130_fd_pr/blob/f62031a1be9aefe902d6[…]6/cells/nfet_01v8/tests/sky130_fd_pr__nfet_01v8__nfet_vth.spice Try to run this spice testbench in ngspice from your machine. It must work without problems. Anyway, the best solution is to install Open PDKs and open the xschem design examples.
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Rahul Bharadwaj

08/24/2021, 5:11 PM
Hello sir. In the corner.spice file, at the end there is a file being included. https://raw.githubusercontent.com/google/skywater-pdk-libs-sky130_fd_pr/f62031a1be9aefe902d6d54cddd6f59b57627436/cells/nfet_01v8/sky130_fd_pr__nfet_01v8_ss.pm3.spice _-- this file(has many models for nfet_01v8)._ If I plot the ID vs VDS graph with a specific Mosfet dimensions which model in the above file will be used to extract the necessary parameters? Thank you in advance. Thanks, Rahul.
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Luis Henrique Rodovalho

08/24/2021, 5:57 PM
In this file, you can see that for each bin there are the a set of parameters. Each bin begins with this code
Copy code
.model sky130_fd_pr__nfet_01v8__model.2 nmos
* Model Flag Parameters
+ lmin = 4.0e-06 lmax = 8.0e-06 wmin = 7.0e-06 wmax = 0.0001
+ level = 54.0
In this case, if you use any nfet_01v8 with a 4u < L < 8u and 7e-6 < W < 100, it will use the bin model.2.
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Rahul Bharadwaj

08/24/2021, 6:00 PM
Thank you so much for replying. Got it.
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Luis Henrique Rodovalho

08/24/2021, 6:06 PM
As @Tim Edwards explained before, the transistors are micro binned. Initially, the PDK only allowed very specifics transistor sizes, then bin W and L ranges were extended. For transistor sizes outside the bin values, the parameters are extrapolated and are not very reliable. https://github.com/google/skywater-pdk-libs-sky130_fd_pr/blob/f62031a1be9aefe902d6[…]d6f59b57627436/cells/nfet_01v8/sky130_fd_pr__nfet_01v8.bins.csv Try to use only transistor dimensions listed in the csv lists. If you really need to use other transistor aspect ratios, I recommend using transistors arrays. Series-parallel association of FET's for high gain and high frequency applications
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Rahul Bharadwaj

08/25/2021, 2:20 AM
Ok sir thank you .
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