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#analog-design
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# analog-design
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Paul George

03/24/2022, 1:06 PM
Hello, what would be the recommended way to characterize (timing) a custom digital cell (generate liberty file) ?
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Arman Avetisyan

03/24/2022, 1:16 PM
as far as I am aware, there is no tools that you can use to generate lib file automatically
... or at least ready for use for sky130.
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Paul George

03/24/2022, 1:20 PM
I found https://github.com/vsdip/vsdStdCellCharacterizer_sky130 , and by and large it does the job. but ive not seen any instance of it being used by the community so far, the osu std cell lib seems to be missing scripts for the commercial tools it depends on.
and therefore my question.
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Arman Avetisyan

03/24/2022, 1:26 PM
Its just a script. Sure you can use it, but its not a fully automatic flow. Still pretty useful. I think you can modify it for your needes.
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Paul George

03/24/2022, 1:30 PM
Thanks for the inputs, That's definitely the approach im looking at. I'm more asking from a perspective of correctness/robustness. since I'm not experienced enough to make that sort of a call. and was hoping to lean into the communities experience for that.
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Arman Avetisyan

03/24/2022, 1:58 PM
Unless you have access to proprietary tools, my input: my approach would be to use the github repo. Modify it for your needs. I am not expert though, so my input might not be the best.
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Philipp Gühring

04/20/2022, 2:51 PM
There is lctime from librecell which can fully characterize combinational cells, and we are currently working on enhancing it for sequential cells. https://codeberg.org/tok/librecell
I have a standard cell library generator flow which uses lctime: https://github.com/thesourcerer8/StdCellLib
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Paul George

07/21/2022, 9:23 AM
Thanks @Philipp Gühring !
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