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#openlane
Title
# openlane
t

tnt

07/25/2020, 12:51 PM
@User How did you deal with that ?
u

20Mhz

07/25/2020, 12:52 PM
didn’t notice, can you refer to script and line number?
t

tnt

07/25/2020, 12:54 PM
I'm looking at https://github.com/efabless/openlane/tree/master/docker_build/docker and there are
yosys
and
antmicro_yosys
.
And looking at the artefacts in the
tar/
subdir, they are both there and contains obviously conflicting binaries ...
Ah no they are installed in different path. But ... I don't see where the
antmicro
one is used at all.
ATM I'm trying to list all the tools I need to install in a prefix.
u

20Mhz

07/25/2020, 12:59 PM
I see, in my case I was just using may previously installed version
t

tnt

07/25/2020, 1:25 PM
So what tools did you / didn't you install ? You just tried running the flow and then fix when you got to an error ?
u

20Mhz

07/25/2020, 2:00 PM
ok, its a bit tricky because I didn’t start clean, I did magice, yosys, qflow, opensta, openroad, openlane, I’m thinking you may be ok just building openroad and adding yosys, vlog2Verilog. Then you still need to change the tcl files so it will use the *_or procs
a

Ahmed Ghazy

07/25/2020, 3:11 PM
@tnt: The antmicro version is not currently used but is available as an option. The difference is that the antmicro one has much better SystemVerilog support, and if it performs equally well on pure verilog designs, then we can make it the default.
👍 3
t

tnt

07/25/2020, 3:12 PM
If it has better SV support, why is that not pushed upstream instead ?
a

Ahmed Ghazy

07/25/2020, 3:26 PM
I believe that there are some optimizations specific for Ibex (see https://github.com/antmicro/ibex-yosys-build/), which is the main focus of that build as far as I understand. Perhaps @mkk can elaborate on this.