Troy Benjegerdes
07/31/2020, 3:40 PM20Mhz
07/31/2020, 7:23 PMmul32: gaisler_target
ghdl -a gaisler/arith/mul32.vhd
ghdl -m mul32
yosys -m ghdl -p 'ghdl mul32; synth -top mul32; write_verilog netlist.v'
2.1.2. Analyzing design hierarchy..
Top module: \leon3s
Used module: \leon3x_0_0_0_8_0_0_0_0_0_2_0_0_0_2_1_4_1_0_0_2_1_4_1_0_0_0_1_142_0_1_143_0_8_8_1_0_2_0_0_2_1_0_0_0_0_0_0_0_0_0_0_0_0_1_0_0_0_0
Used module: \cachemem_0_0_2_1_4_1_0_0_2_1_4_1_0_0_0_1_0_1_0_0_0_0
Used module: \proc3_0_0_0_8_0_0_0_0_0_2_0_0_0_2_1_4_1_0_0_2_1_4_1_0_0_0_1_142_0_1_143_0_8_8_1_0_2_0_0_2_1_0_0_0_0_0_0_1_0_0_0_0_0_0_0_0_1
Used module: \mmu_cache_0_0_0_0_0_2_1_4_1_0_0_2_1_4_1_0_0_0_1_142_0_1_143_8_8_1_0_0_0_0_0_0_0_0_0_0
Used module: \mmu_acache_0_4_0_0_0
Used module: \mmu_dcache_0_0_2_1_4_1_0_0_0_1_143_0_142_8_8_1_0_0_0_0_0_0_0_0
Used module: \mmu_icache_0_0_2_1_4_1_0_0_1_142_0_0_0
Used module: \iu3_8_1_1_0_0_0_0_0_0_2_0_0_2_1_0_0_2_1_0_0_0_0_1_0_0_0_0_0_0_1
Removed 0 unused modules.
../src/ahbrom.vhd:34:14:warning: (in default configuration of ahbrom(rtl))
Undefined symbols for architecture x86_64:
"_grlib__config__ELABORATED", referenced from:
_grlib__config__ELAB_BODY in e~leon3mp.o
_grlib__amba__ELAB_SPEC in amba.o
_techmap__gencomp__ELAB_SPEC in gencomp.o
_grlib__ahbctrl__PKG_ELAB in ahbctrl.o
_gaisler__iu3__PKG_ELAB in iu3.o
_gaisler__mul32__PKG_ELAB in mul32.o
_gaisler__div32__PKG_ELAB in div32.o
...
"_grlib__config__ELAB_SPEC", referenced from:
_grlib__config__ELAB_BODY in e~leon3mp.o
"_grlib__config__grlib_config_array", referenced from:
_work__leon3mp__ARCH__rtl__DEFAULT_CONFIG__ahbctrlO6 in e~leon3mp.o
_grlib__amba__ELAB_SPEC in amba.o
_techmap__gencomp__ELAB_SPEC in gencomp.o
_work__leon3mp__ARCH__rtl__ahb0__COMP_ELAB in leon3mp.o
_grlib__ahbctrl__ARCH__rtl__DECL_ELAB in ahbctrl.o
_gaisler__iu3__ARCH__rtl__DECL_ELAB in iu3.o
_gaisler__mul32__ARCH__rtl__DECL_ELAB in mul32.o
...
Troy Benjegerdes
08/01/2020, 7:44 PM20Mhz
08/01/2020, 11:45 PMDarwin Ronalds-MBP16 19.5.0 Darwin Kernel Version 19.5.0: Tue May 26 20:41:44 PDT 2020; root:xnu-6153.121.2~2/RELEASE_X86_64 x86_64
Finally found the issue, I had a name conflict, two files named config.vhd stepping over config.o.
Unfortunately I hit another issue:
Importing module leon3mp.
Importing module clkpad_53_0_3_0_0_0.
Importing module inpad_53_0_3_0_0.
Importing module clkgen_53_2_2_1_0_0_0_0_50000_0_0_1_0_0.
Importing module outpad_53_0_1_3_24.
Importing module rstgen.
Importing module ahbctrl_0_0_1_0_4095_4095_4080_4080_7_8_0_0_0_2_0_1_0_0_0_0_0_0_0_0_1_1_0_0_0_0_0_0_0.
ERROR: wire not found for $posedge
make: *** [leon3mp] Error 1
Number of cells: 787542
$_ANDNOT_ 45737
$_AND_ 16664
$_DFF_P_ 198368
$_MUX_ 441290
$_NAND_ 2958
$_NOR_ 4470
$_NOT_ 12139
$_ORNOT_ 3525
$_OR_ 47458
$_XNOR_ 1747
$_XOR_ 12896
ahbjtag 1
ahbuart 1
apbctrlx 1
apbps2 2
apbuart 1
clkgen_saed32 1
gptimer 1
grethm 1
grgpio 1
irqmp 1
mctrl 1
memrwcol 40
rstgen 1
saed32_inpad 21
saed32_iopad 55
saed32_outpad 105
saed32_syncram 44
syncrambw 8
techmult 4
Troy Benjegerdes
08/07/2020, 3:53 PM20Mhz
08/07/2020, 4:32 PM