Is it possible to use some other synthesizer and incorporate the netlist in the openlane flow. If yes then what would be the procedure. I mean something like: 1.

prep -design

2. skipping

run_synthesis

[Here can I put the generated netlist in

runs/result/synthesis

and go on with the floorplan?] or

run_synthesis

generates some temporary files which are need for the successive stage 3.

run_floorplan

and so on

You just need to point at the netlist and set some configuration parameters. Use https://github.com/efabless/caravel/blob/release/openlane/DFFRAM/config.tcl as a guide perhaps.