Hi all I am facing the following issue during openLane make open-source-silicon #openlane

Channels

mpw-6plus-silicon

pd-openlane-and-sky130

chipignite2206q_stanford_bringup

cadence-virtuoso

fossee-iitb-esim

dynamic-power-estimation

ieee-sscs-dc-23

gfmpw-0-silicon

silicon-validation

fossee-iitb-google-sky130

ieee-sscs-dc-22

mpw-one-silicon

cadence-innovus

verification-fe

foss-asic-tools

openpositarithmetic

openadiabaticlogic

hardware-beginners

design-services

private-shuttle

tapeout-pakistan

rad-lab-silicon

cadence-spectre

mpw-one-clean-short

coalition-for-digital-environmental-sustainability

vlsi_verilog_using_opensource_eda

vlsi_verilog_using_opensoure_eda

openlane_cloudrunner

digital-electronics-learners

verilog-learners

open-microelectronics-textbook

mwcas-2023-rtl2silicon

system-verilog-learners

vlsi-learners-group

chilechipmakers

silicon-validation-private

openhighqualityresonators

waveform-viewers

vendor-synopsys

silicon-photonics

opendataset-circuitnet-for-ml-tasks-in-vlsi-cad

generative-ai-silicon-challenge

community_denmark_dtu

shuttle-precheck

openlane-development

ieee-sscs-dc-21q3

sky130-pv-workshop

verification-be

Title

n

Nadeem Yaseen

11/24/2020, 7:13 AM

Hi all, I am facing the following issue during openLane 'make' command. Kindly guide me to resolve this issue. Thanks in advance.

r

Riking28

11/24/2020, 10:32 AM

You might have an internet filter that is interfering

n

Nadeem Yaseen

11/25/2020, 4:15 AM

Thanks..