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#openlane
Title
# openlane
a

aryap

11/30/2020, 7:29 PM
has anyone hit an out-of-memory bug with netgen? doing lvs,
netgen -batch lvs
, it consumes 200 GB of ram and gets killed
t

tnt

11/30/2020, 7:32 PM
Yes ...
Trying to remember what it was and how I solved it, gimme a second ...
Do you see a bunch of :
Copy code
Warning:  Cell sky130_fd_sc_hd__decap_8 has no pins
Note:  Implicit pin (no pins)
?
a

aryap

11/30/2020, 7:55 PM
let me see
is it an LVS output? i'll re-run the flow
t

tnt

11/30/2020, 7:56 PM
Yeah it's from LVS.
you can just re-run the LVS step on teh existing run.
or look at the .log
a

aryap

11/30/2020, 7:58 PM
i'd already blown it away when i reran the script
(i just turned LVS off and lo and behold, no problem 😆)
t

tnt

11/30/2020, 7:59 PM
If you don't test, you can't fail 😄
🔥 1
a

aryap

11/30/2020, 8:02 PM
in any case, how did you solve that problem?
actually IIRC I did see that error, now that i think of it, and i thought no problem why does the decap need pins. it's probably connected somewhere along the row
t

tnt

11/30/2020, 8:03 PM
That problem originated from my custom build and
write_powered_verilog
not being called as a result.
a

aryap

11/30/2020, 8:03 PM
checks
oh i see,
Copy code
if { $::env(DIODE_INSERTION_STRATEGY) == 2 } {
		run_antenna_check
		heal_antenna_violators; # modifies the routed DEF
	}

    if { $::env(LVS_INSERT_POWER_PINS) } {
		write_powered_verilog
		set_netlist $::env(lvs_result_file_tag).powered.v
    }
appears in the non-interactive set of commands in
flow.tcl
but not the interactive one
which i also copied like you, i guess
i'll try this. thanks @tnt 🙏
t

tnt

11/30/2020, 8:07 PM
Yeah at some point in openlane that little bit of code got moved from inside some function into the top level
flow.tcl
... and so I needed to update my
interactive.tcl
accordingly ...
a

aryap

11/30/2020, 8:37 PM
that fixed it! 🙏 🙏 🙏
👍 1