Matt Aamold
12/18/2020, 3:58 AMuser_project_wrapper
. I've pushed all of the updates to my repo that @User was helping me with (https://github.com/SweeperAA/caravel_skywater130_decred_miner). I have tried to flow user_project_wrapper
with mpw-one-a
and mpw-one-b
openlane and pdks and it always results in the following LVS errors:
vssd1.extra66 |vssd1 **Mismatch**
vccd1.extra69 |vccd1 **Mismatch**
The mpw prechecker confirms this by failing the consistency check saying a macro isn't powered. And a picture of the user_project_wrapper
GDS below. Could someone take a look at the configuration scripts in my repo and let me know what I'm doing wrong. For reference, I use make user_project_wrapper
to execute the flow.drr
12/18/2020, 4:28 AMCONNECT_GRID
changes in your wrapper power config unless it isn't pushed?
example repo:
https://github.com/mattvenn/caravel-mph/blob/release/openlane/user_project_wrapper/pdn.tcl#L30Matt Aamold
12/18/2020, 4:30 AMdrr
12/18/2020, 4:36 AMCONNECT_GRID
after the first callMatt Aamold
12/18/2020, 4:39 AMif { $::env(CONNECT_GRIDS) } {
statement I start getting syntax errors during the flow.drr
12/18/2020, 4:54 AMSo are you saying that I already have what's in the referenced repo?I mean that config looks different, but the equivalent call to the pdn gen seems to be that I am still figuring out how the PDN config works so take this with a grain of salt. I'm not sure if the
_WITH_STRAPS
config is meant to prevent this problem, I don't have that in my configs. Might be best to confirm with whoever wrote the original config that this is based onMatt Aamold
12/18/2020, 5:28 AMmodule decred_hash_macro (
``ifdef USE_POWER_PINS`
inout vdda1, // User area 1 3.3V supply
inout vdda2, // User area 2 3.3V supply
inout vssa1, // User area 1 analog ground
inout vssa2, // User area 2 analog ground
inout vccd1, // User area 1 1.8V supply
inout vccd2, // User area 2 1.8v supply
inout vssd1, // User area 1 digital ground
inout vssd2, // User area 2 digital ground
``endif`
One of my macros has this, and one of them doesn't. Besides being a bad inconsistency, are these pins required in the macros?tnt
12/18/2020, 6:26 AMmpw-one-b
way of doing things (with no interactive.tcl) although even then you really need only vccd1
and vssd11
AFAIU. If you use the older way then you need the name guarded block but with VPWR
and VGND
.Matt Aamold
12/18/2020, 1:52 PMRECT
in layer `met4`: RECT 174.640 10.640 176.240 187.920 ;
RECT 21.040 10.640 22.640 187.920 ;
The VGND pin has one RECT
in layer `met4`: RECT 97.840 10.640 99.440 187.920 ;
What is it exactly that I am trying to accomplish here and for what reason?tnt
12/18/2020, 1:56 PMPIN
multiple times in the LEF rather than having the pin having multiple RECT
(which would be the "correct way").
Now AFAICS, this seems to create those .extraNNN
notations and I suspect this is what screws with LVS.
So what I'm proposing is to fix the LEF into what it should be in the first place and define the PIN
with multiple metal shapes as a single pin meaning hopefully all those will have the same net name VPWR
and not VPWR.extraNNN
.Matt Aamold
12/18/2020, 2:03 PMtnt
12/18/2020, 2:15 PMMatt Aamold
12/18/2020, 2:17 PMAmr Gouhar
12/18/2020, 2:49 PMMatt Aamold
12/18/2020, 2:52 PMdecred_hash_macro
and reflowed user_project_wrapper
and my DRCs jumped from 0 to 48, so I'm backing out the decred_hash_macro
changes now.
Metal5 spacing < 1.6um (met5.2)
Metal2 width < 0.14um (met2.1)
mpw-one-b
openlane, pdks, etc. I also changed all of the user_project_wrapper
scripts to go to mpw-one-b
default/recommended approach as specified by the mpw-one-b
caravel
. The macros themselves have 0 DRC 0 LVS errors. user_project_wrapper
now has 100 DRCs and 9 LVS errors. user_project_wrapper
also finishes the 64th iteration of detailed routing with 20 violations still. There is no reason there should be any routing problems, there's plenty of space. Running the precheck on this (after make ship
) results in Consistency Checks Failed+ Reason: Instance decred_hash_macro was not connected to any power in ...
and 75 DRCs.
The user_project_wrapper
reported DRCs are:
Violation Message "Metal4 > 3um spacing to unrelated m4 < 0.4um (met4.5b) "found 8 Times.
Violation Message "Metal2 spacing < 0.14um (met2.2) "found 8 Times.
Violation Message "Metal5 spacing < 1.6um (met5.2) "found 78 Times.
Violation Message "Metal2 width < 0.14um (met2.1) "found 6 Times.
The user_project_wrapper
reported LVS violations are:
Subcircuit summary:
Circuit 1: user_project_wrapper |Circuit 2: user_project_wrapper
-------------------------------------------|-------------------------------------------
decred_hash_macro (4) |decred_hash_macro (4)
decred_controller (1) |decred_controller (1)
Number of devices: 5 |Number of devices: 5
Number of nets: 85 **Mismatch** |Number of nets: 77 **Mismatch**
---------------------------------------------------------------------------------------
NET mismatches: Class fragments follow (with fanout counts):
Circuit 1: user_project_wrapper |Circuit 2: user_project_wrapper
---------------------------------------------------------------------------------------
Net: decred_hash_block0/VPWR |Net: vssd1
decred_hash_macro/VPWR = 1 | decred_controller/VGND = 1
| decred_hash_macro/VGND = 4
|
Net: decred_hash_block0/VGND |Net: vccd1
decred_hash_macro/VGND = 1 | decred_controller/VPWR = 1
| decred_hash_macro/VPWR = 4
|
Net: decred_hash_block1/VPWR |(no matching net)
decred_hash_macro/VPWR = 1 |
|
Net: decred_hash_block2/VPWR |(no matching net)
decred_hash_macro/VPWR = 1 |
|
Net: decred_hash_block3/VPWR |(no matching net)
decred_hash_macro/VPWR = 1 |
|
Net: decred_hash_block1/VGND |(no matching net)
decred_hash_macro/VGND = 1 |
|
Net: decred_hash_block2/VGND |(no matching net)
decred_hash_macro/VGND = 1 |
|
Net: decred_hash_block3/VGND |(no matching net)
decred_hash_macro/VGND = 1 |
|
Net: decred_controller_block/VPWR |(no matching net)
decred_controller/VPWR = 1 |
|
Net: decred_controller_block/VGND |(no matching net)
decred_controller/VGND = 1 |
---------------------------------------------------------------------------------------
Netlists do not match.
Netlists do not match.
Amr Gouhar
12/18/2020, 7:01 PMMatt Aamold
12/18/2020, 7:03 PMuser_project_wrapper
now results in 63 DRCs and 9 LVS errors. The new mpw precheck results in:
Consistency Checks Failed+ Reason: Instance decred_hash_macro was not connected to any power in ...
DRC Checks on MAG Failed, Reason: Total # of DRC violations is 87
user_project_wrapper DRCs:
Violation Message "Metal4 > 3um spacing to unrelated m4 < 0.4um (met4.5b) "found 11 Times.
Violation Message "Metal2 spacing < 0.14um (met2.2) "found 14 Times.
Violation Message "Metal5 spacing < 1.6um (met5.2) "found 38 Times.
Total Magic DRC violations is 63
user_project_wrapper LVS: Same as previous post.