<@U01634FSETZ> <@U016HSALFAN> Apart from cells tha...
# openlane
@User @User Apart from cells that have DRC issues (eg https://github.com/google/skywater-pdk/issues/261), is there anything else forcing them into
? I see OpenROAD has fixed one issue recently: https://github.com/The-OpenROAD-Project/OpenROAD/commit/d2b6f73118fd237d9376043b9fd1a061a69f22ab
@Anton Blanchard: Some cells cause DRC violations because of the hard to access, and it looks like this won't be the case for long. There were some of the lpflow cells with an extra power pin that the flow didn't know how to deal with (I don't recall the cell name). Also, there are the physical cells and the clk buffers, both are handled at their own respective steps and shouldn't be manipulated during synthesis or optimizations. For that purpose, I started to separate the no_synth.cells into three files (two at the moment) here: https://github.com/agorararmard/open_pdks/tree/drc-exclude-list. We're also working in aggressively reducing the list and making it design specific.
@Amr Gouhar @Ahmed Ghazy excellent!
@Anton Blanchard that commit was for a cell with a difficult pin access not a DRC in the cell itself. The sky130_fd_sc_hs__xor3_1:B is mostly blocked from via access.
@Matt Liberty: Yeah, I understand. I guess I misspoke in that part. I meant to include the hard-to-access pins as part of my "DRC violations" statement.
The specific cells referred to in issue #261 cited above have just plain old base rule errors. I fixed a few of them and generated a patch file which now needs to be stuck in a pull request on the repo. But since then, a couple more cells were identified that I have not (yet) fixed. The fixes are (more or less) trivial and I have no idea how those errors got into the designs.
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