Hello everyone, I want to explore Physical verifi...
# openlane
Hello everyone, I want to explore Physical verification using OpenLane. I am looking for some designs having DRC/LVS errors with less execution time on OpenLane. If anybody can point me to such resource, it would be very helpful.
Nothing right now. Last issues I had were after 20minutes. Is that short enough time?
I still have a few DRC issues left in the current version, and it doesnt take long to run it: https://github.com/thesourcerer8/caravel_stdcelllib_stdcells_project
I would be very interested in the results of the Physical Verification Exploration 🙂
@Matt Venn Yes! Can you share them?
@Philipp Gühring Thankyou! I will surely share the results.