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Vijayan Krishnan

08/10/2021, 1:14 PM
I am running test design called riscv_top. Got struck with below error. [NesterovSolve] Iter: 400 overflow: 0.807943 HPWL: 31750827247 [NesterovSolve] Iter: 410 overflow: 0.785143 HPWL: 33368401976 [ERROR]: during executing: "openroad -exit /openLANE_flow/scripts/openroad/or_replace.tcl |& tee >&@stdout /openLANE_flow/designs/riscv_top/runs/1strun3skylib2/logs/placement/7-replace.log" [ERROR]: Exit code: 1 [ERROR]: Last 10 lines: child killed: kill signal ========Anyone have idea how to fix this? Running in OpenLane v0.23 with sky130A PDK @User
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Indira Iyer

08/16/2021, 2:34 PM
@Vijayan Krishnan Did you submit a GH on this problem?
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Vijayan Krishnan

08/16/2021, 3:12 PM
Hi OL Team,
Steps to reproduce issue: #make mount #./flow.tcl -design riscv_top -init_design_config Edit config.tcl and set CLK name as clk_i untar src.tar.xz and copy those src files in src folder. #./flow.tcl -design riscv_top Check whether this run stop with above error message or not? Thanks..
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Indira Iyer

08/16/2021, 3:40 PM
Thanks @Vijayan Krishnan
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