Hello. I want to thank Manar for the update on common_pdn.tcl. After the update of @User  , I run my design with macro and get the error in the following figure. My macro includes a sensor and sky130_sram_4kbyte_1rw1r_32x1024_8. sensor use VDD and VSS as power pin and sram use vccd1 and vssd1 as its power pin. So I change the "set macro" in common_pdn.tcl as follows.

set macro {

orient {R0 R180 MX MY R90 R270 MXR90 MYR90}

power_pins "vccd1 VPWR VDD"

ground_pins "vssd1 VGND VSS"

blockages "li1 met1 met2 met3 met4"

straps {

}

Could anyone share suggestion and advice on this error? Thanks!

@Peijun Hou You can try skipping the pdn check by setting

FP_PDN_CHECK_NODES

to 0, it will bypass this step and if there is an issue with the pdn connection it will be flagged by LVS

We should consider setting this to 0 by default. Does it ever actually help?

@Matthew Guthaus No it doesn't for me

I had to disable it too...

@Matthew Guthaus It helps only when the pdn isn't connected as it will flag it, but I have seen it take long run time with large designs and multiple power domains.

@Manar Abdelatty Thank you. Could you also share suggestions on the LU factorization problem? Since it seems that setting 

FP_PDN_CHECK_NODES

 to 0 won't stop it.

@Peijun Hou Sorry it seems to be related to the IR drop calculation, you can disable it by setting

FP_PDN_IRDROP

to 0

@Manar Abdelatty Thanks. Looks like it work. May I ask what should I do with this error?

@Peijun Hou It is probably because of the warning before it that global routing finished with an overflow. You can try increasing the die area to see if it helps