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```[WARNING]: Current core area is too small for a...
# openlane
k
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[WARNING]: Current core area is too small for a power grid
[WARNING]: !!! THE POWER GRID WILL BE MINIMIZED. !!!
m
AFAIK this usually should not cause bad things happen. But it will change the size of the V/H-PDN-pitch so this may cause your FP/PL depending on settings you choose. So as a result, please check the LVS results to make sure that everything’s OK. P.S. This is based on my knowledge, maybe someone else could help much better.
k
@User Hi, the problem is when You use this small design as a macro because it distributes vertical power straps using other pitch and offset so there is no chance to make it aligned with the top level of the macro
m
@User That's exactly correct! However you can change the size of the wrapper/macro straps.
k
yes I was thinking about that but i think it can bring me some more problems trying to align it with caravel
moreover the deadline is close
what I did was to merge 2 macros in 1, thus I do not have this warning and PDN straps are spaced using default values
BTW do You know what those parameters FP_PDN_VOFFSET, FP_PDN_VPITCH, FP_PDN_HOFFSET, FP_PDN_HPITCH. exactly mean ? They have values assigned but the values do not match the physical distances, when measured y the final GDS usin Klayout and a ruler
m
@User You can check it here but for example: FP_PDN_VPITCH: The distance from the middle of two vertical straps with THE SAME name (e.g. two vccd1). For more info plz check here.
k
ok, I have measured it and it perfectly make sense for the vertical straps
what about the horizontal rails ?
m
@User FP_PDN_HPITCH: Exactly the same rule as the vertical.
k
but it does not match to be like 153 u
m
it should be around 180u AFAIK.
k
set ::env(FP_PDN_VOFFSET) 16.32 set ::env(FP_PDN_VPITCH) 153.6 set ::env(FP_PDN_HOFFSET) 16.65 set ::env(FP_PDN_HPITCH) 153.18
so first booth H and V have the same offset and pitch
however the horizontal grid seems to be much more dense

https://skywater-pdk.slack.com/files/U01GLU3UDRD/F02LAKX0HGV/pdn.png▾

the outside macro does have 153.6 of pitch but the horizontal lines are much more closer
m
That’s funny! Why ur met5 is vertical and met4 is horizontal?!
k
who knows
m
Did you change ur settings?
k
no
m
Well, looks like you need an expert to help 😄
Would you mind share ur config file here
k
I agree
of course
config.tcl
config.tcl
m
what about the wrapper?
k
the result of this flow will be used as a macro instantiated by the wrapper
so I have like 2 levels of macros
m
I know. I mean would you mind share the config file of the wrapper as well.
I see some strange options in ur config.
k
Until now I have not used wrapper I plan to use the default one of the caravel
m
OK got it. Do you want to see my github repo. Maybe it can help you?
k
if You be so kind would be nice
m
It’s midnight here and I got to go. Plz feel free to ask any questions regarding my settings. I’d be so much happy to help.
k
as I can see You do not care much about the macr position
mprj 1000 1500 N mem 1000 200 N
what about Your DRC, is it ok ?
m
Zero DRC errors.
k
interesting
in fact now I am changing my design to have only one macro level, as You have
so hope it will work
m
Plz note that, the best idea is to instantiate all macros in the wrapper. Not the user design.
Take a look at this design. It has a loooot of macros, all in the wrapper: https://github.com/VLSIDA/openram_testchip
Only put your digital design (which needs to be synthesized) in the user design and then instantiate it as a macro in the wrapper. I did try what you’re about to do and it was a whole failure for me!
k
ok, taknks for Your support
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