We've (@User and I) noticed that TritonCTS produces clock trees with quite a bit of skew (~2ns or more). Looking at the command options, there isn't anything to actually guide it in terms of "effort" or a "skew goal". How can one go about making a better clock tree? In particular, this adds to hold violations on our chip. @User?

This is 2ns after repair_clock_nets or just raw cts?

It's in the final STA with parasitics. I didn't not ice a repair_clock_nets but I assume it was run in the flow. Yes, it has many large macros.

In general CTS is not iterative so there is no effort flag. A test case would be helpful if you can share it

(Note, half or more of my publications are on clock synthesis. 🙂 CTS definitely SHOULD be iterative

It should be a lot better... but it is what it is currently

That's too bad. I proposed originally to do it but didn't get selected.

If you want to work on it we would be glad for the help

Not unless there's funding 🙂

Can you share your test case?

What do you want for the test case? def/lef?

https://github.com/The-OpenROAD-Project/OpenLane/blob/master/docs/source/using_or_issue.md is best for OL test cases

@User can you run this for the CTS step and specify that it produces a poor quality tree?

Please include what build you are using