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Matthew Guthaus

01/03/2022, 7:16 PM
We've (@User and I) noticed that TritonCTS produces clock trees with quite a bit of skew (~2ns or more). Looking at the command options, there isn't anything to actually guide it in terms of "effort" or a "skew goal". How can one go about making a better clock tree? In particular, this adds to hold violations on our chip. @User?
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And, if there are options, these should be exposed in OpenLane...
All of the options seem very heuristic -- "cluster balance" "max diameter" etc.
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Matt Liberty

01/03/2022, 7:23 PM
This is 2ns after repair_clock_nets or just raw cts?
does the design have large macros? Sometimes they are hard to balance
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Matthew Guthaus

01/03/2022, 7:24 PM
It's in the final STA with parasitics. I didn't not ice a repair_clock_nets but I assume it was run in the flow. Yes, it has many large macros.
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Matt Liberty

01/03/2022, 7:24 PM
In general CTS is not iterative so there is no effort flag. A test case would be helpful if you can share it
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Matthew Guthaus

01/03/2022, 7:25 PM
(Note, half or more of my publications are on clock synthesis. 🙂 CTS definitely SHOULD be iterative
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Matt Liberty

01/03/2022, 7:25 PM
It should be a lot better... but it is what it is currently
We lost our CTS developer and are ramping up someone else
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Matthew Guthaus

01/03/2022, 7:26 PM
That's too bad. I proposed originally to do it but didn't get selected.
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Matt Liberty

01/03/2022, 7:27 PM
If you want to work on it we would be glad for the help
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Matthew Guthaus

01/03/2022, 7:27 PM
Not unless there's funding 🙂
Only so much time to work "for free"
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Matt Liberty

01/03/2022, 7:27 PM
Can you share your test case?
We have no spare funding so.....
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Matthew Guthaus

01/03/2022, 7:28 PM
What do you want for the test case? def/lef?
it packs all the needed files for a step
lef/def/sdc/lib
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Matthew Guthaus

01/03/2022, 7:29 PM
@User can you run this for the CTS step and specify that it produces a poor quality tree?
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Matt Liberty

01/03/2022, 7:37 PM
Please include what build you are using