Can somebody help me? I am trying to use OpenLane to harden my analog project. The reason I want to use OpenLane is I want to place my Analog I/O cells which connect to pads and connect the Analog I/O cells' digital I/O to some standard cells. I ran an OpenLane with fixed macro locations, however the pads has been auto routed with default widths. I researched how it's done in Chip IO of caravel, it seems the DEF is created by OpenLane script, however it also seems that I cant use that one, because the pad rings of my cell are a single big component going from top to bottom, while in the script it assumes that pads have specific width and distance between each other and the distance between them is filled with pad ring cells. Is there anyway to use my .GDS file which includes my cells and metal layers as base for the OpenLane flow, but the GDS is used as a DEF, so it contains the metal connections? Or maybe force it to use my widths + via rules? Or the only way would be to have a .gds that has three sides (top, left, right) as components then export it as lef/blackbox verilog and then use manual macro placement example with fixed locations for this cells? I assume OpenLane will not try to route my left/right/top components and the pads should be connected to the left/right/top TL; DR: I have a blackbox GPIO cell, however I don't know how to force OpenLane to route the GPIO cell's "PAD" signal or use my ready-to-use gds with routing.

There is a way to specify non-default width for any route in OpenROAD. @User can tell you whether or not this can be done now in Openlane. I know that it wasn't done for Caravel chip_io and, especially for chip_io_alt, I re-did all of the power connections by hand. But that was done some time ago, and the non-default width specification is a more recent addition to OpenROAD, as I understand it.

So after some research it seems I should be able to use my DEF (which contains all pad/power routing), which is what I am trying to do. However currently the flow crashes as it thinks that my analog pin needs to be routed, then complains about not being able to route an analog pin