Mitch Bailey
02/02/2022, 2:24 AMio_out
are unused.
In the resulting gate level verilog, these signals have all been tied to ground.
sky130_fd_sc_hd__conb_1 _60713_ (.LO(io_out[0]),
.VGND(vssd1),
.VNB(vssd1),
.VPB(vccd1),
.VPWR(vccd1));
This can lead to unexpected results, if "unused" signals are shared with actual signals from other modules. Is this a yosys issue?
@UserMatt Liberty
02/02/2022, 4:10 AMMitch Bailey
02/02/2022, 4:37 AM.LO(io_out[0])
Arman Avetisyan
02/02/2022, 10:07 AMMatt Liberty
02/02/2022, 12:31 PM