Can someone please help with the following IO plac...
# openlane
a
Can someone please help with the following IO placement error? I am trying to instantiate a picorv32 core with 1 SRAM that are both hardened individually as macros. Is there a limit on the number of I/O pins? I do not see this issue when I try the flow with the vanilla picorv32a design, which also has a lot of I/O pins.
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[INFO]: Running IO Placement...
OpenROAD 8d53e9b018dec98fa63e907ddeb6c5406f035361
This program is licensed under the BSD-3 license. See the LICENSE file for details.
Components of this program may be licensed under more restrictive licenses which must be honored.
[INFO ODB-0222] Reading LEF file: /openlane/designs/picorv32_sram/runs/RUN_2022.03.18_15.23.42/tmp/merged.lef
[INFO ODB-0223]     Created 13 technology layers
[INFO ODB-0224]     Created 25 technology vias
[INFO ODB-0225]     Created 443 library cells
[INFO ODB-0226] Finished LEF file:  /openlane/designs/picorv32_sram/runs/RUN_2022.03.18_15.23.42/tmp/merged.lef
[INFO ODB-0127] Reading DEF file: /openlane/designs/picorv32_sram/runs/RUN_2022.03.18_15.23.42/tmp/floorplan/3-initial_fp.def
[INFO ODB-0128] Design: picorv32_sram
[INFO ODB-0130]     Created 341 pins.
[INFO ODB-0131]     Created 877 components and 6168 component-terminals.
[INFO ODB-0133]     Created 948 nets and 2516 connections.
[INFO ODB-0134] Finished DEF file: /openlane/designs/picorv32_sram/runs/RUN_2022.03.18_15.23.42/tmp/floorplan/3-initial_fp.def
Found 0 macro blocks.
Using 1u default distance from corners.
[INFO PPL-0007] Random pin placement.
[ERROR PPL-0072] Number of pins (341) exceed number of valid positions (174).
Error: ioplacer.tcl, 60 PPL-0072
[ERROR]: during executing openroad script /openlane/scripts/openroad/ioplacer.tcl
[ERROR]: Exit code: 1
[ERROR]: Last 10 lines:
child process exited abnormally
a
Wild guess: Not enough area for pin placement. Most likely the DIE AREA si too low
a
Yup, setting die area to 1mm x1mm got me past the first error, but now I'm hit with the following error.
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Placing the following macros:
{'cpu': ['100000', '100000', 'N'], 'sram': ['800000', '100000', 'N']}
Design name: picorv32_sram
Traceback (most recent call last):
  File "/openlane/scripts/manual_macro_place.py", line 139, in <module>
    assert not macros, ("Macros not found:", macros)
AssertionError: ('Macros not found:', {'cpu': ['100000', '100000', 'N'], 'sram': ['800000', '100000', 'N']})
[ERROR]: during executing: "openroad -python /openlane/scripts/manual_macro_place.py -l /openlane/designs/picorv32_sram/runs/RUN_2022.03.18_17.36.16/tmp/merged.lef -id /openlane/designs/picorv32_sram/runs/RUN_2022.03.18_17.36.16/tmp/floorplan/4-io.def -o /openlane/designs/picorv32_sram/runs/RUN_2022.03.18_17.36.16/tmp/floorplan/4-io.macro_placement.def -c /openlane/designs/picorv32_sram/runs/RUN_2022.03.18_17.36.16/tmp/placement/macro_placement.cfg -f |& tee >&@stdout /openlane/designs/picorv32_sram/runs/RUN_2022.03.18_17.36.16/logs/placement/5-macro_placement.log"
[ERROR]: Exit code: 1
[ERROR]: Last 10 lines:
child process exited abnormally
Not sure why the macros wouldn't be found. All I had to do was point to the gds,lef files in config.tcl (after copying them to some location) and specify macro positions in another cfg file (which is also pointed to, in config.tcl), right?
a
The names of macros need to be directly copied from netlist. Did you do it?
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No, I haven’t. So are you suggesting I can’t generate the gds of a design with macros in a non-interactive fashion? Because to know the netlist names I’ll have to pause after synthesis, right?
Uploaded the files at https://github.com/aanujdu/openlane_z2a in case someone wants take a look.
Fixed it. There was a typo in the module name causing it to mismatch with the macro name. I'm facing another error related to pdn now that I'll post as a separate thread if I need help.
a
You can run it. Then you can stop it. Then copy from netlist and restart "So are you suggesting I can’t generate the gds of a design with macros in a non-interactive fashion" Next it does not fit. If I understand correctly, your macros are too big. And you are overlapping them. Use openroad -gui Then load merged lef and the def of the step in question. I bet they overlap or go out of die area
2. You need to properly place SRAM cell and CPU cell