general question on designing with fets...I've got 3 nfets, two are connected at source and the sources are connected to drain of the third...they are standard (non-power) fets so they are symmetric...I assume I can create a single npos with 2 fingers to handle the two connected at source...to connect the third, can I extend the ndiff down in a T shape and add a gate on top? or does the ndiff need to remain straight and I connect with locali or a metal layer?

Even if the process allows, the T effectively does “routing” in active-diff: usually not best. All src/drn area & perim contributes diode parasitics (cap & leakage). In typical stick diagram of nor2 layout, the output is tied to the (smaller) shared src/drn between the two nfets, relegating power to the outer src/drns: i.e. avoid added diff-perim where it slows down active signals.