Why don't the foundry cell libraries provide pass transistors (or something along the lines of a tristate buffer)?

There are three state buffers (einvp, ebufn, einvn). Pass gates (where input is channel-connected to the output) are normally avoided in synthesis as these make timing analysis extremely difficult if not impossible. logic cells for synthesis have gated input and buffered output. My guess (experts shoud correct me if i am wrong) is that if pass-gates are needed they should reside in another (non-synthesis oriented) library.

@Stefan Schippers: One of the user projects---one of the FPGA cores---added a custom transmission gate cell compatible with the sky130_fd_sc_hd library, so that's available for use (I already forgot which one and would need to look it up).

We will be publishing the cells on the OpenFPGA website here soon.

Also watch out for pass gates as the diodes from pmos drain/source to the n-well can cause trouble if you shut off the power rail for a block (unless you make all of the inputs zero, or force ordinary inverters/buffers between input pins and pass gates).