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#general
Title
# general
t

Tim 'mithro' Ansell

06/22/2021, 4:52 PM
i

Iztok Jeras

06/26/2021, 8:06 PM
I have https://github.com/jeras/rp32, this is a single stage RV32/64 IMC implementation, missing the privileged spec interrupts,BREAK, RV64 M is incomplete ... It uses heavily SV structures, wildcard operators. Was not synthesized yet, but it should be synthesizable, ALU is not optimized for synthesis.