Hi again all, is there any documentation for the C...
# riscva
Adam RIchardson
03/02/2022, 11:40 AMHi again all, is there any documentation for the CPU memory layout and implementation for the Caravel SoC? The linker script has changed quite a lot and it's no longer clear to me where sections should be placed. Has anyone seen a diagram?
z
Zeeshan Rafique
03/06/2022, 5:50 AMHi,
You might want to read these books:
Chapter 4 for implementation: https://www.amazon.com/Computer-Organization-Design-RISC-V-Architecture/dp/0128122757
Zeeshan Rafique
03/06/2022, 5:52 AMChapter 2 or 3: which named “Assembly” for linkers and memory hierarchy: https://www.amazon.com/RISC-V-Reader-Open-Architecture-Atlas/dp/0999249118
a
Adam RIchardson
03/07/2022, 9:35 AMThanks @User, I was more referring to the specifics for the Caravel SoC rather than a general overview of assembly and linkers
z
Zeeshan Rafique
03/07/2022, 3:20 PMAh no worries, at least you should mention that in your message.
👍 1