<@U016HU5HK8V> which setRC.tcl are you using? We j...
# openroad
m
@User which setRC.tcl are you using? We just updated it recently so I am not sure if it is available in the public branch yet
a
@User: Just to clarify, he's only running openDP after global placement (no resizer optimizations or anything).
t
yeah, this was using OpenLane. But I looked at the code and it didn't see like it was possible to do what I wanted.
m
Got it. But it is weird that there is 100% util.
t
@mehdi It's because I have 3 large macros and I was trying to manually place them and define a placement area that was only enough for the standard cell logic and not including the macro area (I was manually placing them outside the area).
m
@tnt Understood.. So I am guessing this was fixed.
t
Well, I found another way to achieve the same thing, if I place the macro 'close enough' to each other and 'close enough' to the border so there is place for routing but not for cells ... it does what I want more or less :

https://i.imgur.com/jl6iUDo.png

Although for some reason it still ends up placing some diode in weird spots 🤷‍♂️ :

https://i.imgur.com/dl9oVZo.png

m
@tnt This is interesting. Is this testcase shareable? the diode are placed next to the sink actually. That's why you see it next to the pin. We do not allow the diode to be place in a different row because of legalization and routing consideration. Can you provide this as a testcase?
t
Sure this is for the shuttle so it's all going to be opensource. I'll push it to a git repo later tonight.
m
Great! thanks. We will try to come up with a fix for the diode thing. You are using openlane?
t
yep, I'm on the
develop
branch. I did have to modify the
run_floorplan_or
function though, to do the manual macro placement before calling
global_placement_or
, so that OpenRoad sees the macro as being
FIXED
m
got it
t
Turns out all but 1 of the DRC violations I'm getting now are due to those antennas placed there ... (they pretty much all hit something)
m
@tnt What is the DRC error you are getting
t
"N-well spacing < 1.27um (nwell.2a)"
Those diodes aren't in a zone where the grid was constructed
So ... no continuous nwell defined, they just appear in the middle of nowhere. No power rail or PDNeither.
m
yes, got it. Thanks!