Is there is any way to avoid changing manually ins...
# openroad
Is there is any way to avoid changing manually inserted cells during resizer phase (openroad/or_resizer.tcl) ? repair_design -slew_margin $::env(PL_RESIZER_MAX_SLEW_MARGIN) \ -cap_margin $::env(PL_RESIZER_MAX_CAP_MARGIN) Background: I see tool is modifying manually inserted DELAY cells to buffer. Is there is any option to set dont touch cells to exclude manually inserted cells?
set_dont_use $::env(DONT_USE_CELLS) @User Do we have set_dont_touch for cells during runtime
DONT_USE_CELLS are list cells should not be used in design
set_dont_touch [get_ports *] whether this option available for cells? need to explore
manually inserted cells. Can you explain briefly?
Typically we manually insert Standard cell for clock Mux and Internal clock source with Buffer and Interface Timing with Hold fix cells. Typically other commerical tools have option to say don't touch attribute to a instance, These instance are not touch by the tool optimization function.
Currently during Yosys synthesis phase, i see these cells are retained by resizer logic blindly changing the cells to higher drive buffers
do you have dont_touch variable in your lib for those manually inserted cells?
This will not a .lib attributes & These are not special cells .. This is constraint to tool to avoid modifying specific instances
My analysis says the changes is happening in : src/rsz/src/ Resizer::resizeToTargetSlew(const Pin *drvr_pin, bool update_count) { Instance *inst = network_->instance(drvr_pin); LibertyCell *cell = network_->libertyCell(inst); if (cell) { bool revisiting_inst = false; if (hasMultipleOutputs(inst)) { revisiting_inst = resized_multi_output_insts_.hasKey(inst); debugPrint(logger_, RSZ, "resize", 2, "multiple outputs{}", revisiting_inst ? " - revisit" : ""); resized_multi_output_insts_.insert(inst); } ensureWireParasitic(drvr_pin); // Includes net parasitic capacitance. float load_cap = graph_delay_calc_->loadCap(drvr_pin, tgt_slew_dcalc_ap_); if (load_cap > 0.0) { LibertyCell *target_cell = findTargetCell(cell, load_cap, revisiting_inst); if (target_cell != cell) { debugPrint(logger_, RSZ, "resize", 2, "{} {} -> {}", sdc_network_->pathName(drvr_pin), cell->name(), target_cell->name()); if (replaceCell(inst, target_cell, true) && !revisiting_inst && update_count) resize_count_++; } } } return false; } Currently i am locally hacking this logic
I see this logic blindly changes any cells load cap > 0.0 with higher drive equivalent cells.
ok.. wait for update from @User
Sorry I don't check this slack often. Technically ODB supports this (setting with
and checking with
) but I don't think any code uses this functionality. Something you can try is saving the DEF, modifying the inst as
and then reloading it. If that doesn't work, you can open a bug report/feature request to support
in resizer.
A temporary hack is that I know resizer ignores special nets. So if you mark that net as special then it will ignore the net as well as any instances attached to it. But this may yield undesirable results.