Hi, i have been trying to create 1rw port 32X512 R...
# openram
a
Hi, i have been trying to create 1rw port 32X512 Ram using openram but when i try to run the makefile it throws error regarding odd no of columns and rows, which i try to handle usinf spare row,column, but then later in the generation i get the following error, how to solve it? And can we create byte wise writable ram using 1r1w port?