Hi, Does anyone know if I could to make a circuit mixed signal in xschem?

There are a couple designs that are mixed signal. You probably want an analog top

user_analog_project_wrapper

with digital macros. The digital macros will be just symbols in the schematic (edit the

*.sym

file so that the ports are listed in the same order as the verilog ports). This allows you to run device level lvs. I’m not sure how simulation would work.

Yes but in this moment I would like to do a simulation about a circuit mixed signal

I believe you can convert verilog to spice and maybe use that to simulate everything (if it’s not too big) in spice. Look into qflow.

And you know how can I do that ?

See https://open-source-silicon.slack.com/archives/C032Y8J3KHA/p1644844585439939

the only true mixed signal i was able to do is with ngspice, converting some subcircuits into xspice netlists using the

spi2xspice.py

script from Tim's

qflow

. In below picture two identical subcircuits are simulated, cyan is simulated transistor level with ngspice, yellow is simulated event driven with ngspice's Xspice engine. The example is in the xschem_sky130 test circuits. (

sky130_tests/test_stdcells.sch

)

You know how Can I run this example ?, doesn’t work

First try a simple analog simulation with sky130. Does a simple test work? What is the ngspice version you have? What does not work in above example? what is the error? If simulator does not complete try to enable status reporting:

Simulations-> Configure simulators and tool

and for ngspice enable the

status

checkbox. At the end of the ngspice run a report is displayed showing if simulation completed of failed and the reason.

31 it’s so old?

yes 31 is too old. See instructions here for building a recent ngspice.

I used the xspice feature of ngspice. You write the digital part in verilog and synthesize a spice netlist using yosys. You do of course need to provide the logic functions available in ngspice/xspice to yosys. Then you use the adc/dac brigde function of xspice to change between domains. I would say it works very well and is very fast to execute.

The

spi2xspice.py

script does what @Christoph Weiser said above, but you just feed it the SPICE netlist of a synthesized digital circuit (from openlane, say, and then extracted from magic to get the netlist), and the details of the adc/dac bridges are all taken care of automatically, and the output is an xspice subcircuit that is an exact replacement for the original subcircuit. Search for other discussions in this thread about

spi2xspice

. Several people got it working and used it for mixed-signal simulations.