trying to fix the standard cell documentation w/ https://github.com/google/gf180mcu-pdk/pull/87

I just took a quick look at an example cell https://gf180mcu-pdk--87.org.readthedocs.build/en/87/digital/standard_cells/gf180mcu_fd_sc_mcu7t5v0/cells/and3/gf180mcu_fd_sc_mcu7t5v0__and3_1.html and noticed that the schematic looks wrong to me. The layout screenshot suggests the implementation is a 3 input NAND followed by an inverter but the schematic shows two cascaded ANDs. Functional the same of course but if the idea behind showing the schematic is to show the implementation then perhaps they should match?

@Tom can you open a bug with https://github.com/google/gf180mcu-pdk/issues/new so that we can discuss it with the rest of the community?