HI all...I had a problem understanding testing the design via the wishbone interface. Suppose I define a register

#define reg_wb_serial (*(volatile uint32_t*)0x30000000)

and I want to use only one bit of the wishbone to write to my design which is a register. I tried the following but it is not working:

reg [127:0] temp;
always@(posedge clk) begin
if(rst) begin
     ready <=0;
     temp <=0;
end else if (valid && !ready) begin
     temp <= temp << 1;
     temp[0] <= wbs_dat_i[0];
     ready <=1;
end
end
assign out = temp[127];

then in the c file

#define reg_wb_serial (*(volatile uint32_t*)0x30000000)
int val =0;
int main(){
reg_wb_enable = 1;

// other configs
for (int i =0; i<128; i++)
{
   val = ~val;
   reg_wb_serial = (0x00000000 | val);
}
}

Could you tell me where I'm doing wrong? Thanks in advance for any help.

post your repo