An 8th-grade VSD intern just built and open-sourced a single-cycle RV32IM RISC-V CPU—and brought it to life on the VSDSquadron FPGA Mini (Lattice iCE40UP5K). From RTL to real hardware using an open toolchain (Yosys → nextpnr → IceStorm). No labs full of expensive gear—just curiosity, discipline, and a clear learning path. What’s inspiring here isn’t just the result, it’s the signal: hands-on semiconductor education can be accessible, rigorous, and joyful. If a motivated school student can do this, imagine what a college cohort—or a national talent pipeline—can achieve with the same playbook. See it yourself • GitHub (source & docs): https://github.com/bytesculptor097/rv32im-single-cycle-cpu/ • Short demo video (hardware run): • Board (VSDSquadron FPGA Mini): https://www.vlsisystemdesign.com/vsdsquadronfm/ If you’re an educator, lab lead, or industry mentor, this is a ready-to-run, frugal pathway to get students building real CPUs and learning RISC-V the right way—by doing.