this is not what I get though

@Rita, select the gate, do a 'q' on it and set the supply voltages: Assuming you have

VCC

and

GND

set in your circuit do:

VGND=GND VNB=GND VPB=VCC VPWR=VCC

isn't VSS already 0?

If you are using VSS then set the gate attributes to:

VGND=VSS VNB=VSS VPB=VCC VPWR=VCC

I already did that, see the last picture I sent

I have simulated this gate and it works. Picture and complete netlist attached

Just an idea @Rita but maybe verify that VCC is actually connected to the pin of the output OR gate?

@Rita also ensure this line is present in the netlist. The actual path depends on the location of the PDK on your computer:

.include /home/schippes/share/pdk/sky130A/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice

This line loads the spice netlists of all standard cell gates.