#291 make: *** [Makefile:130: tech-sky130] Error 2 New issue created by odevdeneme7896354125 Hello, I'm new here. But I'm trying about 8 times but it didnt work. Every time make command runs about 1 hour but gives this error. Where can i look for it ? Remove the base verilog files which have already been included into the libraries rm -f /home/cip/open_pdks/sky130/sky130A/libs.ref/sky130_fd_sc_lp/verilog/_._.v make[3]: Leaving directory '/home/cip/open_pdks/sky130' make[2]: Leaving directory '/home/cip/open_pdks/sky130' echo "Ended sky130A PDK staging on "`date` >> sky130A_make.log make[1]: Leaving directory '/home/cip/open_pdks/sky130' make: * [Makefile130 tech-sky130] Error 2 Here the last command line output. How can i fix this ? Also i'm getting "Permission denied" and "Could not write file. Cell not written." outputs too. Is that normal or i must look for solution for it ? -Best regards RTimothyEdwards/open_pdks