Hi all! I see iHP writes its models in vloga instead of C (like for BSIM). Is there any loss of accuracy here? Can the models be trusted to the same degree as BSIM4? Do the vloga models take in the same parameters as the BSIM ones?

These are PSP models, which are nominally better than BSIM. There is no issue with VerilogA; it is the new language of choice for transistor modeling. Anything else would be considered outdated for new developments.

Thanks @Boris Murmann. This is excellent data and saves me having to characterise a lot of the numbers! The gm/id plot looks pretty respectable in that we don't see the unusual "kink" observed in SW130! From this can I conclude weak inversion is modeled correctly in this process (you report an unexpected "bump" in the gm/id*ft characteristic). Should I stay above some min vov? Overall this process and its modelling seems excellent so looking forward to getting stuck in!

I think that bump may be ok. Not a big issue, I would say.

Great! Thanks for confirming.

@Diarmuid Collins please keep in mind that right now our mayor concerns is not about the model but about the Verilog-A compilers and model cards. IHP-Open-PDK has support for two simulators: ngspice, which is the primary and Xyce as a secondary options. Each one supports Verilog-A compiled models in a different way. Ngspice uses OSDI interface to interact with an OSDI bidary compiled by

openvaf

, while Xyce uses plugins compiled by ADMS. Booth compilers are different and have own issues. We are doing our best to support it, especially ngspice + openvaf.

Good to know. I have been using an openvaf/xschem/ngspice combo for the past year and found it works really well.