I need help with a Caravel project. Does anyone kn...
# caravel
w
I need help with a Caravel project. Does anyone know how to use the management SoC's memory for the user project? I don't have enough space to add SRAM in the user project area. If anyone has worked on this and knows how to use the management memory for the user project, could you please share your project so I can understand how it was done?
If anyone knows how to do this, a short call to guide me would be greatly appreciated. Thank you!
t
There isn't a way for the user project to be a wishbone bus master, so it is difficult to have the user project access the memory in the management area directly. You would have to have some program running on the management processor to copy memory contents to the user project on demand.
w
How can this be achieved? If I load some instructions into the memory of the management SoC, how can my user project access those instructions? My main goal is to run the instructions on the User Project SoC rather than the Management SoC.