What is

sky130_fd_pr__padplhp_example_559591418080

which is found in

sky130_fd_io__pad_esd

?

@Mariana Huerta: This has to do with ways in which magic copes with layouts that were not generated using magic. When creating the magic views in the installed PDK from the sources in skywater-pdk, for the I/O cells, I did a complete flattening of all layouts containing

_example_

in any subcell name. It was necessary to do this to get magic to recognize many of the I/O devices. In this case of the pad cells, the subcell did not need to be flattened, but finding exceptions like this one is difficult, so I just applied a wildcard string

*_example_*

to all cells. When cells in magic read from GDS are flattened, the subcell reference remains in the parent cell even though the cell contents have been flattened and removed from the subcell, so that it can retain a pointer to the locations of the data in the original GDS file. That's why you see empty cells (except for some unattached labels and other subcell references). If you read the file

sky130_fd_io.gds

into magic directly (without the wildcard-based subcell flattening), you will see the actual contents of the cells (one of the "example" cells contains the pad metal and glass cut, and the other one contains the contacts).

What type of ESD protection does

sky130_fd_io__pad_esd.mag

have? And how can I verify the ESD protection through extraction?

In spite of the name,

sky130_fd_io__pad_esd

has no ESD protection whatsoever. You would have to look at an entire pad cell like

sky130_fd_io__top_gpiov2

to find the ESD structures, which are

sky130_fd_io__gpiov2_buf_localesd

for the input buffer. The output ESD protection seems to be all part of the output buffer itself, making use of the output device diffusion to act as ESD diodes, as well as the diffusion in the output driver guard rings.

Are schematics of the Caravel pads such as

sky130_fd_io__pad_esd

and

sky130_fd_io__top_gpiov2

available? I am able to see the

.mag

files but I can't find

.sch

files for them.

Honestly, I'm not sure. It has a flanged gate which is a strange structure and violates normal DRC rules (the DRC rules are bypassed for that cell). Apparently it makes the device more ESD tolerant, but I don't know the physics behind it.