hi , any logic equivalence tool used in the flow ? for rtl2 gate level checks. Or for net2net
l
Lab Lecture
09/16/2022, 9:17 AM
I tried to turn on LEC in openlane flow. It failed at RTL to Gate LEC after yosys synthesis. So no question about LEC at the later stages. People are taping out with this.
r
Ryan R
09/16/2022, 2:57 PM
@Arman Avetisyan@Vijayan Krishnan any views on this