I am running a design and getting the error of rou...
# sky130
a
I am running a design and getting the error of routing congestion too high. any idea how to solve that error?
f
Decrease density and increase die size by reducing these parameters: PL_TARGET_DENSITY FP_CORE_UTIL
👀 2
a
okay lemme try. also do u have any idea about synth strategies. what is the difference between then. how do we choose the most suitable one
f
What do you mean by synth strategies?
a
the synthesis strategies like AREA 0, AREA 1, ....AREA 3,DELAY 0,......,DELAY 4
e
Those are different abc scripts for synthesis. I suggest trying each one.
v
https://github.com/The-OpenROAD-Project/OpenLane/issues file issue here with test case to resolve the issue
a
@Ethan Mahintorabi thats what I wanna know. how to choose which one to use. and some of thrm like AREA 0 was failing even at the logical synthesis stage. why?
v
Copy code
./flow.tcl -design design_name -synth_explore
This will give all suitable synthesis option area/timing and choose best as per your need