open-source-silicon.dev

<@U03DF1S9UJ0>  could you tell where can I find the reram model that efabless supports?

<https://github.com/google/skywater-pdk-libs-sky130_fd_pr_reram|https://github.com/google/skywater-pdk-libs-sky130_fd_pr_reram>

This is the library for reram in sky130. It has a .va model for reram that you can use.

Is it possible to import skywater device models to ltspice?

Sorry I dont know about that. You can ask in other threads. Someone might know about it

<@U03DF1S9UJ0>  what tool do you use to simulate verilog A ? How did you import .va model file of reram to xschem?

Xyce simulator can be used to simulate reram model in xschem. Other than that, you can also import verilog-a model in cadence virtuoso if you have access to that

Where to download xyce from? Could you provide a link? So xyce supports verilog A , right?

<https://xyce.sandia.gov/|https://xyce.sandia.gov/>

This is the official site for xyce. It contains the download procedure  and also installation procedure.