I'm having beginner problems with a bandgap reference. At first I though the startup circuit was to blame but now that I look at the levels of the nmos + pmos cascode gate voltages I see that they rise to almost the same levels as the pmos equivalents. I think therefore that the startup circuit is possibly not to blame. When I add ammeters in the two arms of the current mirror arrangement the simulator is not happy. I can post the source files if it is helpful...

vbiasp1, 2 appear to be higher than the supply voltage. biases are nonzero when vdd is zero. there’s definitely an error somewhere in the setup.

I wonder about what I've done by referencing vss throughout the circuit and tying vss to ground via the symbol pin. I also wonder about computing the transient operating point in that there is no DC source - only a pulse source.

The "vdd" symbol you're using for "vss" has a side effect of putting a .global vss in the netlist and making it a global net. You're also passing it as a pin and tying it to the "gnd" symbol (and that symbol also puts a ".global GND" line in the netlist. When in doubt, take a look at the netlist to make sure your connections are implemented as intended. I'd ditch the "vdd" symbol and just use a "lab_wire" symbol to connect vss and vdd by netname since you pass them as ports. There may be other problems.

Thanks for help and the info