After doing some debugging from my side, I found that the pins where it is showing the mismatch are not numbered in the same order in the layout as they are numbered in schematic. The order should be "Drain Gate Source Bulk". But it is not the case for two of the NMOS transistors in the layout. Therefore, I manually corrected the order of pins for those two transistors and created a new .spice file. Here is the updated .spice file after manually updating the pin sequence for those two NMOS transistors:

@Shavika Rastogi mosfet source and drain pins are generally interchangeable. You should be using the netgen setup file from the pdk to enable source-drain swapping on mosfets. The setup file will also ignore the property errors for non extracted parameters.

netgen lvs "OTA_updated.spice OTA" "gm_mos_bias.spice gm_mos_bias" $PDK_ROOT/$PDK/libs.tech/netgen/sky130A_setup.tcl

@Mitch Bailey I have used the same command to run lvs. It looked like this : netgen -batch lvs "OTA_updated.spice OTA" "gm_mos_bias.spice gm_mos_bias" ~/foss/pdks/sky130A/libs.tech/netgen/sky130A_setup.tcl

@Shavika Rastogi Can you dump the screen output to a log file and share that file?

netgen -batch lvs "OTA_updated.spice OTA" "gm_mos_bias.spice gm_mos_bias" ~/foss/pdks/sky130A/libs.tech/netgen/sky130A_setup.tcl | tee lvs.log

@Mitch Bailey Here is the log file:

@Shavika Rastogi Can you make sure the setup file exists?

ls ~/foss/pdks/sky130A/libs.tech/netgen/sky130A_setup.tcl

@Mitch Bailey I tried to locate the setup file using the command pasted by you, but it does not exist. However, when I removed ~ sign used the command as : ls /foss/pdks/sky130A/libs.tech/netgen/sky130A_setup.tcl, I was able to locate the setup file.

@Shavika Rastogi Congratulations on passing LVS. Please ignore the “No property found” errors.