Do we have any separate power pin for analog and d...
# chipignitea
Aleena Kabeer
11/08/2024, 8:50 AMDo we have any separate power pin for analog and digital. (vdda1 and vccd1)
m
Mitch Bailey
11/08/2024, 9:11 AMThere are 4 separate power domains. vssa1/vdda1, vssa2/vdda2, vssd1/vccd1, vssd2/vccd2
a
Aleena Kabeer
11/08/2024, 10:29 AMDo vssa1 for analog designs?
Aleena Kabeer
11/08/2024, 10:31 AMone more doubt in this wrapper for analog we have io_clamp_low and high for io_analog pins [6] and and between[5]
Aleena Kabeer
11/08/2024, 10:32 AMhow we will take connections
Aleena Kabeer
11/08/2024, 10:33 AMcan we use io_analog[0] and io_analog[1]
m
Mitch Bailey
11/08/2024, 3:32 PMvssa1 is often used for analog designs. Be aware that if you want to totally isolate the vssa1 analog ground from the digital ground, you will need to enclose the entire cell in deep nwell surrounded by an nwell guardring.
The chip_io_alt.v says that the clamps are only necessary if using the pads for power sources.