sherin
11/05/2024, 12:54 PMMitch Bailey
11/05/2024, 1:01 PMtmp/hier.csv
file in the precheck_results/<timestamp>
directory. This shows any cell count mismatches. If you digital design contains cell count mismatches, LVS is unlikely to pass (or maybe even unlikely to finish).
Look at the tmp/lvs.report
directory. You should be able to see where cells aren’t matching.
Are you by any change using OpenRAM macros?Mitch Bailey
11/05/2024, 1:01 PMsherin
11/05/2024, 1:01 PMMitch Bailey
11/05/2024, 1:04 PMmake precheck
make run-precheck
sherin
11/05/2024, 1:04 PM